This invention relates to memory devices and particularly to flash memory devices. Flash memory devices are provided as storage in personal digital assistants, laptop and other computers, digital audio players, digital cameras, mobile phones and other electronic devices.
Flash memory is a type of EEPROM (Electrically Erasable Programmable Read-Only Memory). EEPROM flash memories are formed by arrays of semiconductor memory cells. Each of the memory cells includes a floating gate field-effect transistor having an electrically isolated gate (floating gate) capable of holding a charge. The data in a cell is determined by the presence or absence of the charge on the floating gate. Charges are transported to or removed from the floating gate by specialized programming and erase operations. Flash memory is non-volatile because no power is needed to maintain the charge on the floating gates and hence no power is needed to maintain the stored information. Write fatigue of floating gate memory cells can occur after repetitive writes and erasures so that the memory cells do not properly have the correct charges and hence cause errors in the stored data.
For reading and writing of data from and to a flash memory, the cells are accessed on a random access basis to change the charge or read the charge on the floating gates. For erasing data from a flash memory, cells are grouped into sections called “erase blocks”. The charge is removed from the floating gates by block erase operations in which all floating gate memory cells in the erase block are erased in a single erase operation. In flash memory devices, a block can be written with new data only when the block is in the Erased State. Therefore, before a block can be written with new data, the block has to be erased to the Erased State. In the Erased State, all the bits in the block have the same logical state, typically a logical value of “1” so that the Erased State is an all 1's state.
A flash memory device contains multiple logically addressable pages. Commonly used flash devices have 4KByte pages and 512KByte erasable blocks. For example, pages that store between 512 bytes of data and 8K bytes of data have between 512×8 bit cells and 8K×8 bit cells.
In storage systems including flash memory devices, embedded operating systems (OS) manage the data stored in the flash memory devices and maintain records of which pages are available to store new data. Data is stored in the memory using coding.
In one example, BCH coding is used for flash memories. BCH coding uses codes that are a class of parameterized, error-correcting codes which are easily decoded using syndrome receiving. Syndrome receiving is desirable since it is easily implemented with simple electronic hardware. As a class of codes, BCH codes are highly flexible and allow control over block length and acceptable error thresholds. Custom BCH codes can be easily designed according to well-known mathematical constraints. BCH codes have a code length, N, and have a correction power, T.
In flash memory, the data stream includes user data and non-user data. The non-user data is for control (such as data preambles) and other functions and is identified as “nuisance data”. Conventionally, synchronization marks are embedded by the transmitter into the data stream stored into the memory in order to identify the difference between user data and nuisance data. The receiver of the data read from the memory detects the synchronization marks so that the receiver can identify where the user data starts and ends. In actual operation, however, synchronization marks have been unreliable due to errors that occur in the data streams. Such errors interfere with detection of the synchronization marks. Also, the reliability of synchronization marks is reduced when the synchronization mark pattern appears in the data stream as part of user data. While synchronization marks can be expanded in size so as to be more reliably detected, such expansion interferes with the limited space available for synchronization marks and reduces the capacity and efficiency of the memory.
In consideration of the above background, it would be desirable to provide flash memory devices that have improved methods and apparatus for distinguishing between user data and nuisance data.